All corrections
Wikipedia October 15, 2026 at 07:24 PM

en.wikipedia.org/wiki/X86-64

2 corrections found

1
Claim
The AMD64 architecture defines a 64-bit virtual address format, of which the low-order 48 bits are used in current implementations.
Correction

Current AMD64 implementations are no longer limited to 48-bit virtual addresses. AMD documentation for EPYC 9004 shows 57-bit virtual addressing.

Full reasoning

This statement is outdated. AMD’s own documentation for current EPYC 9004 processors shows 57 bits virtual address size, not 48 bits.

AMD’s 4th Gen EPYC architecture material also states that virtual memory is now addressable through 57 bits with a fifth level of page tables. So it is no longer correct to say that current AMD64 implementations use only the low-order 48 bits of the virtual address.

2 sources
2
Claim
Current implementations of the AMD64 architecture (starting from AMD 10h microarchitecture) extend this to 48-bit physical addresses
Correction

Current AMD64 implementations are not limited to 48-bit physical addresses. AMD documents current EPYC 9004 processors as using 52-bit physical addressing.

Full reasoning

AMD documentation for current EPYC 9004 processors reports 52 bits physical address size, not 48 bits.

AMD’s March 2026 AMD64 Architecture Programmer’s Manual, Volume 2: System Programming likewise says the architecture’s page-translation mechanism supports translation of a 64-bit virtual address to a 52-bit physical address. That means the article’s claim that current implementations extend only to 48-bit physical addresses is outdated/incorrect.

2 sources
Model: OPENAI_GPT_5 Prompt: v1.16.0