x.com/lauriewired/status/2110776805007425862
1 correction found
Every *single* core has to go through the same process, but by this point it's faster because Main RAM is warmed up.
Secondary x86 cores do not each rerun the full firmware boot path. On multiprocessor x86 systems, one bootstrap processor runs the BIOS/UEFI boot flow while the other application processors are held in Wait-for-SIPI and only execute targeted startup code when the BSP wakes them.
Full reasoning
This overstates how x86 multiprocessor bring-up works.
On Intel systems, after reset the bootstrap processor (BSP) is the core that starts executing BIOS firmware from the reset vector. Intel's own microcode guidance says that after FIT processing, "the bootstrap processor (BSP) begins fetching and executing the BIOS firmware from the IA reset vector, while the application processors (APs) enter into the Wait-for-SIPI state." In other words, the non-BSP cores do not all proceed through the same SEC/PEI/DXE firmware path at power-on.
The UEFI/TianoCore PEI documentation says the same thing from the firmware side: "The HW puts APs into Wait-For-SIPI at reset. Code running on the BSP must wake an AP to get the AP to run any code." It further notes this is typically done later, in DXE, by the CPU-init driver. That is inconsistent with the claim that every core goes through the same whole boot process and only does so faster because DRAM is already "warmed up."
What does happen is more limited: secondary cores may later receive a SIPI and run AP initialization code, and firmware/OS may load per-core microcode or perform other per-core setup. But that is not the same as each core independently redoing full memory training, PCIe enumeration, boot-device discovery, and the rest of the platform boot flow.
So the inaccurate part is the claim of equivalence: secondary cores are brought up differently from the BSP, and they do not each repeat the full boot sequence.
2 sources
- Microcode Update Guidance
After loading an update from the FIT, the bootstrap processor (BSP) begins fetching and executing the BIOS firmware from the IA reset vector, while the application processors (APs) enter into the Wait-for-SIPI state.
- PEI - TianoCore EDK II Documentation
The HW puts APs into Wait-For-SIPI at reset. Code running on the BSP must wake an AP to get the AP to run any code. This could be done in any/all of the PI Phases, but it is typically done in the DXE Phase when the DXE Driver that perform CPU initialization is executed.