All corrections
Wikipedia October 15, 2026 at 07:24 PM

en.wikipedia.org/wiki/Protected_mode

2 corrections found

1
Claim
Hardware x86 virtualization required for virtualizing the protected mode itself, however, had to wait for another 20 years.
Correction

Protected-mode x86 was already being virtualized in software before VT-x/AMD-V. Hardware assist arrived later, but it was not required.

Full reasoning

This is incorrect because protected-mode x86 virtualization existed before Intel VT-x and AMD-V.

A VMware paper from 2006 explains that, before the new hardware extensions, x86 virtual machine monitors such as VMware Workstation and Virtual PC used binary translation of guest kernel code. In other words, protected-mode guests were already being virtualized in software; the later hardware extensions added another implementation technique, but were not a prerequisite for virtualizing protected mode.

So the accurate distinction is:

  • hardware virtualization support for x86 arrived roughly 20 years later;
  • but protected-mode x86 did not have to wait for that support to be virtualized at all.

That makes the statement's use of "required" wrong.

2 sources
  • A Comparison of Software and Hardware Techniques for x86 Virtualization

    Until recently, the x86 architecture has not permitted classical trap-and-emulate virtualization. Virtual Machine Monitors for x86, such as VMware Workstation and Virtual PC, have instead used binary translation of the guest kernel code.

  • Vx32: Lightweight, User-level Sandboxing on the x86

    Since the x86 architecture did not provide explicit support for virtualization until recently, x86-based virtual machines such as VMware had to use dynamic instruction translation to run guest kernel code in an unprivileged environment while simulating the appearance of being run in privileged mode.

2
Claim
Programs that require segment manipulation
Correction

Ordinary segment manipulation is not itself a VM86 exception condition. In virtual 8086 mode, segment registers still use 8086-style address formation.

Full reasoning

This overstates what virtual 8086 mode traps.

Intel's 80386 manual says that in virtual 8086 mode the processor specifically checks the VM flag when loading segment registers so it can use 8086-style address formation. It also states that in V86 mode the processor does not interpret 8086 selectors through protected-mode descriptors; instead, it forms linear addresses exactly as an 8086 would.

That means ordinary 8086-style segment register use and manipulation are a normal part of VM86 execution, not something that inherently generates an exception. The Intel manuals identify the sensitive cases as things like privileged/IOPL-sensitive instructions and I/O handling, not generic "segment manipulation."

2 sources
Model: OPENAI_GPT_5 Prompt: v1.16.0