en.wikipedia.org/wiki/Sapphire_Rapids
4 corrections found
QPI speeds 16 GT/s
Sapphire Rapids uses Intel UPI, not Intel QPI. Intel’s own Sapphire Rapids specs list an Intel UPI speed of 16 GT/s.
Full reasoning
This line uses the wrong interconnect name. Intel’s official Sapphire Rapids product specifications and technical overview identify the socket-to-socket link as Intel Ultra Path Interconnect (UPI), not QuickPath Interconnect (QPI).
For example, Intel’s Xeon Platinum 8490H (a Sapphire Rapids CPU) lists “Intel® UPI Speed: 16 GT/s” and “Max # of UPI Links: 4.” Intel’s Sapphire Rapids Max Series technical overview likewise lists “Intel® UPI Interconnect Speed Up to 16 GT/s.”
So the speed itself is in the right range, but labeling it as QPI is incorrect for Sapphire Rapids; the correct label is UPI.
2 sources
- Intel® Xeon® Platinum 8490H Processor
Intel® UPI Speed 16 GT/s ... Max # of UPI Links 4
- Intel® Xeon® Scalable processor Max Series
Number of Intel® Ultra Path Interconnect (Intel® UPI) Interconnects ... Up to 4 links per CPU ... Intel® UPI Interconnect Speed ... Up to 16 GT/s
On-package High Bandwidth Memory 2.0e memory as L4 cache on Xeon Max models
Intel’s Xeon Max documentation describes this memory as HBM2e, not “2.0e,” and says it can run in HBM-only, Flat, or Cache mode—not only as an L4 cache.
Full reasoning
Intel’s own Xeon Max documentation contradicts this wording in two ways:
- Memory generation: Intel describes the package memory as HBM2e, not “High Bandwidth Memory 2.0e.”
- How it is used: Intel says the HBM “operates in three different modes HBM only, Flat and Cache.” That means it is not inherently or exclusively an L4 cache. Cache mode is only one supported configuration; in Flat mode it is exposed separately to software, and in HBM-only mode there is no DDR memory installed.
So the article’s wording is inaccurate both on the HBM generation label and on the claim that Xeon Max uses the on-package HBM simply “as L4 cache.”
1 source
- Intel® Xeon® Scalable processor Max Series
The Intel® Xeon® Scalable processor Max Series includes high bandwidth memory ... up to 64GB of HBM2e memory per socket. ... The memory operates in three different modes HBM only, Flat and Cache.
With its maximum of 60 cores, Sapphire Rapids-SP competes with AMD's Epyc 8004/9004 Genoa with up to 96 cores and Bergamo with up to 128 cores.
AMD’s 8004 series is not “Genoa.” AMD identifies EPYC 9004 as Genoa, EPYC 97x4 as Bergamo, and EPYC 8004 as Siena, with up to 64 cores.
Full reasoning
This sentence incorrectly groups AMD’s EPYC 8004 processors under the Genoa codename.
AMD’s official product materials split these families as follows:
- EPYC 9004 processors are formerly codenamed “Genoa.”
- EPYC 97x4 processors are formerly codenamed “Bergamo.”
- EPYC 8004 processors are formerly codenamed “Siena” and are described by AMD as single-socket, energy-efficient CPUs with up to 64 “Zen 4c” cores.
So the article’s phrase “Epyc 8004/9004 Genoa” is incorrect. EPYC 8004 is a separate Siena family, not part of Genoa.
2 sources
- 4th Generation AMD EPYC™ Processors
Drive exceptional time-to-results with AMD EPYC™ 9004 processors. Formerly codenamed “Genoa” ... 4th Gen AMD EPYC™ 97x4 processors, formerly codenamed “Bergamo” ... AMD EPYC™ 8004 Processors, formerly codenamed “Siena”, designed to be a highly energy efficient CPU for single-socket platforms. With up to 64 “Zen 4c” cores...
- AMD EPYC™ 8004 Series
AMD EPYC™ 8004 Series Processors are part of the fourth generation of AMD EPYC server-class processors ... Code name | “Siena”
64 GB HBM2a (Xeon Max only)
Intel’s Xeon Max documentation specifies 64 GB of HBM2e, not HBM2a, and says that memory is configurable in HBM-only, Flat, or Cache mode.
Full reasoning
Intel’s official Xeon Max documentation describes the package memory as “up to 64GB of HBM2e memory per socket.” It does not identify it as HBM2a.
Intel also says this memory “operates in three different modes HBM only, Flat and Cache.” Because Cache mode is only one of several supported modes, presenting the entire 64 GB simply as “L4 cache” is misleading.
So this infobox entry is inaccurate on both the HBM generation label and the implication that the on-package HBM is just an L4 cache.
1 source
- Intel® Xeon® Scalable processor Max Series
The Intel® Xeon® Scalable processor Max Series includes high bandwidth memory ... up to 64GB of HBM2e memory per socket. ... The memory operates in three different modes HBM only, Flat and Cache.